1. Field of the Invention:
This invention relates in general to elevator systems, and more specifically to elevator systems in which a plurality of elevator cars are controlled by a system processor.
2. Description of the Prior Art:
Elevator systems of the prior art in which a plurality of elevator cars are controlled by a central control system, conventionally were relay implemented. The supervisory control of a relay implemented system receives input signals from the various elevator cars in parallel, the signals are processed in parallel, and parallel output signals are generated for controlling the various elevator cars. Replacement of relays by solid state switching devices and logic gates, as such devices became available, continued the parallel approach of the relay control systems.
Programmable system processors for controlling a group of elevator cars have many advantages over the nonprogrammable control systems, as the decision making and operating strategy may be confined to the software package, allowing the hardware to be substantially the same for each elevator installation. The programmable processor, which operates with a digital computer and a software package, does not have the large number of logic elements necessary to operate with parallel processing of signals, but takes advantage of its rapid processing ability to sequentially process the signals received from the cars, and to generate signals serially for control of the various cars. Powerful mini-computers have a memory capacity and operating speed sufficient to prepare, store and readout commands to a plurality of elevator cars, with the precise timing required to place the signals within the proper time or scan slots for use by the various car controllers. The mini-computer programmable processor is well suited for the larger banks of high speed elevators, but it is too costly for the smaller banks of medium speed elevators.
The microprocessors, such as Intel's MCS-4 and MCS-8, Rockwell's PPS, Signetic's PIP, National's GPC/P and AMI's 7300, offer an attractive cost package as well as flexibility due to the LSI circuitry and programmability. The central processing unit (CPU) is usually a single chip, with the typical software package stored in companion read-only-memories (ROMS). Data is stored in random access memories (RAMS).
While the microprocessor offers programming flexibility at a modest cost, it also imposes certain restrictions due to its relatively limited speed and memory capacity. The interface between the processor and each car controller becomes especially critical due to the memory and operating speed restrictions.
It would thus be desirable to provide a new and improved elevator system which utilizes a microprocessor, with new and improved processor-to-car interface circuits which work within the memory and operating speed restrictions of a typical microprocessor.